In technical applications, in particular such as in the motor vehicle or the industrial goods sector, i.e., in the engineering and automation industries, for instance, the use of control and regulation systems for safety-critical applications based on microprocessors or computers is growing steadily. Today, dual processor systems or dual core systems are commonly used processor systems for safety-critical applications, especially inside the vehicle, such as anti-lock braking systems, the electronic stability program (ESP), X-by-wire systems such as drive-by-wire or steer-by-wire as well as brake-by wire, etc., or in other networked systems as well. These high safety requirements in future applications call for powerful error-detection mechanism and error-treatment mechanism, in particular in order to counteract transient faults as they occur, for example, in the minimization of the semiconductor structures of the processor systems. It is relatively difficult to protect the core itself, i.e., the processor. As mentioned, one solution for this problem is the use of a dual processor system or dual core system for error detection.
Such processor units having at least two integrated execution units are therefore also referred to as dual core or multi-core architectures. According to conventional systems, such dual core or multi-core architectures are proposed mainly for two reasons:
For one, their use allows an increase in output, i.e., enhanced performance, by regarding and treating the two execution units or cores as two computing units on one semiconductor component. In this configuration, the two execution units or cores process different programs or tasks. This allows an increase in performance, which is why this configuration is called performance mode.
The second reason for realizing a dual core or multi-core architecture is an increase in reliability since both execution units process the same program in redundant fashion. The results of the two execution units or CPUs, i.e., cores, are compared, and an error may then be detected in the comparison for agreement. In the following text this configuration is called safety mode or also error detection mode.
As a result, today there are, on the one hand, dual or multiprocessor systems which operate redundantly in order to detect hardware errors (cf. dual core or master-checker systems) and, on the other hand, dual or multiprocessor systems, which process different data on their processors. If one then combines these two operating modes in one dual or multiprocessor system (for the sake of simplicity, this is called a dual processor system exclusively from now on although the devices and methods hereof may just as well be used in multiprocessor systems), the two processors must receive different data in performance mode and the same data in error detection mode.